Reference:Reference-009103: Difference between revisions

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{{<span class="error">Expansion depth limit exceeded</span>|Firstname=Bhaskaran, Gopal; Gaurav, Pratyush;  
{{BibEntryCargo
|Firstname=Bhaskaran, Gopal; Gaurav, Pratyush;  
|BibType=journalArticle
|BibType=journalArticle
|Title=Optimizing Performance of ROMS on Intel Xeon Phi
|Title=Optimizing Performance of ROMS on Intel Xeon Phi
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|Note=Auto downloaded ref at: 2020-06-25
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{{<span class="error">Expansion depth limit exceeded</span>|PublicationMultipleModelsCargo=ROMS
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Latest revision as of 16:12, 8 October 2024



Author(s) Bhaskaran, Gopal; Gaurav, Pratyush;
BibType journalArticle
Title Optimizing Performance of ROMS on Intel Xeon Phi
Editors
Year 2015-01-01
Journal Procedia Computer Science
Booktitle
Volume 51
Pages 2854–2858
URL https://linkinghub.elsevier.com/retrieve/pii/S1877050915012557
DOI 10.1016/j.procs.2015.05.447
ISBN
Note Auto downloaded ref at: 2020-06-25


 
Feature reference No
PublicationClusterID 0
MS_PublicationClusterID 2185687657
Semantic_ID 2bcfd88a0bf52327e502d1700004228bd853ac5e
Nr of citations 4
Sort of publication a module application description
Sort of model publication a single module
Is the CSDMS HPC used No
If HPC is used, for what project was it?:
Associated simulation movie if any:


Model(s) discussed: ROMS